Q-In D flip-flop, D stands for _____________
a) Distant
b) Data
c) Desired
d) Delay
…………
Answer: b
Explanation: The D of D-flip-flop stands for “data”. It stores the value on the data line.
Q-A D flip-flop can be constructed from an ______ flip-flop.
a) S-R
b) J-K
c) T
d) S-K
…………
Answer: a
Explanation: A D flip-flop can be constructed from an S-R flip-flop by inserting an inverter between S and R and assigning the symbol D to the S input.
Q-In D flip-flop, if clock input is LOW, the D input ___________
a) Has no effect
b) Goes high
c) Goes low
d) Has effect
…….
Answer: a
Explanation: In D flip-flop, if clock input is LOW, the D input has no effect, since the set and reset inputs of the NAND flip-flop are kept HIGH.
Q-Which statement describes the BEST operation of a negative-edge-triggered D flip-flop?
a) The logic level at the D input is transferred to Q on NGT of CLK
b) The Q output is ALWAYS identical to the CLK input if the D input is HIGH
c) The Q output is ALWAYS identical to the D input when CLK = PGT
d) The Q output is ALWAYS identical to the D input
………….
Answer: a
Explanation: By the truth table of D flip flop, we can observe that Q always depends on D. Hence, for every negative trigger pulse, the logic at input D is shifted to Output Q.
Q-The characteristic equation of D-flip-flop implies that ___________
a) The next state is dependent on previous state
b) The next state is dependent on present state
c) The next state is independent of previous state
d) The next state is independent of present state
………..
Answer: d
Explanation: A characteristic equation is needed when a specific gate requires a specific output in order to satisfy the truth table. The characteristic equation of D flip-flop is given by Q(n+1) = D; which indicates that the next state is independent of the present state
Q-A positive edge-triggered D flip-flop will store a 1 when ________
a) The D input is HIGH and the clock transitions from HIGH to LOW
b) The D input is HIGH and the clock transitions from LOW to HIGH
c) The D input is HIGH and the clock is LOW
d) The D input is HIGH and the clock is HIGH
………..
Answer: b
Explanation: A positive edge-triggered D flip-flop will store a 1 when the D input is HIGH and the clock transitions from LOW to HIGH. While a negative edge-triggered D flip-flop will store a 0 when the D input is HIGH and the clock transitions from HIGH to LOW.
NEXT////